Crystalline silicon photovoltaic (PV) modules currently (as of 2012), account for approximately over 85% of the overall global PV annual demand market and cumulative globally installed PV capacity. The manufacturing process for crystalline silicon PV is based on the use of crystalline silicon solar cells, starting with mono-crystalline or multi-crystalline silicon wafers made of czochralski (CZ) silicon ingots or cast silicon bricks. Non-crystalline-silicon-based thin film PV modules (e.g., such as CdTe, CIGS, organic, and amorphous silicon PV modules) may offer the potential for low cost manufacturing process, but typically provide much lower conversion efficiencies (in the range of single digit up to about 14% in STC module efficiency) for commercial thin-film PV modules compared to the mainstream crystalline silicon PV modules (which provide module efficiencies in the typical range of approximately 14% up to about 20%, and mostly in the range of about 14% to 17%, for commercial crystalline silicon modules), and an unproven long-term track record of field reliability compared to the well-established crystalline silicon solar PV modules. The leading-edge crystalline silicon PV modules offer superior overall energy conversion performance, long-term field reliability, non-toxicity, and life cycle sustainability compared to various other PV technologies. Moreover, recent progress and advancements have already driven the overall manufacturing cost of crystalline silicon PV modules to at or below approximately $0.65 to $0.80/Wp. Disruptive monocrystalline silicon technologies—such as high-efficiency thin monocrystalline silicon solar cells fabricated based on the use of reusable crystalline silicon templates, thin (e.g., crystalline silicon absorber thickness from approximately 10 μm up to about 100 μm, and typically ≦70 μm) epitaxial silicon, thin silicon support using backplane attachment/lamination, and porous silicon lift-off technology—offer the promise of high-efficiency (with solar cell and/or module efficiencies of at least 20% under Standard Test Conditions or STC) and PV module manufacturing cost at well below $0.50/Wp at mass manufacturing scale.
FIG. 1A is a schematic showing the equivalent circuit of a typical solar cell, such as a crystalline silicon solar cell or a compound semiconductor such as a GaAs solar cell. A solar cell may be represented as a current source, producing the photo-generation or light-induced current shown as IL or also known as short circuit current Isc (the current that flows when the solar cell base and emitter terminals are electrically shorted), in parallel with a diode, also in parallel with a parasitic shunt resistance, and in series with a parasitic series resistance. The electrical current produced by the current source depends on the level of sunlight irradiation power intensity on the solar cell. Undesirable dark current ID is produced by the recombination losses in the solar cell. Voltage across the solar cell when its terminals are open and not connected to any load is known as Voc or open-circuit voltage. A realistic solar cell equivalent circuit also includes the finite series resistance RS and the finite shunt resistance RSH, as shown in the circuit schematic diagrams of FIGS. 1A and 1B. In an ideal solar cell, the series resistance RS is zero (i.e., no series resistance ohmic power losses) and the shunt resistance RSH is infinite (no shunt resistance power dissipation losses). However, in actual and realistic solar cells, the finite (non-zero) series resistance is due to the fact that a solar cell has parasitic series resistance components in its semiconductor absorber layer and in the metallization structure (i.e., it is not a perfect electrical conductor). Such parasitic resistance components, including semiconductor layer resistance and metallization resistance result in some ohmic losses and power dissipation (and hence, Fill Factor degradation) during the solar cell operation. The finite (non-infinite) shunt resistance is caused by the undesirable leakage of current from one terminal to the other due to detrimental effects such as area-based and edge-induced (including but not limited to imperfect edge isolation) shunting defects as well as other non-idealities in the solar cell. Again, an ideal solar cell would have a series resistance of zero and a shunt resistance of infinite resistance value.
FIG. 2A is again a schematic showing an equivalent circuit model of the solar cell, showing the current source, photo-generation current, and dark current (but not showing the parasitic series and shunt resistance components), and FIG. 2B is a corresponding qualitative current-voltage (IV) graph showing the typical current-voltage (IV) characteristics of a solar cell such as a crystalline silicon solar cell, with and without sunlight illumination on the cell. IL and ID are the desirable active photo-generated current and the undesirable dark current of the solar cell, respectively.
Solar cells used in photovoltaic (PV) modules are essentially photodiodes—they directly convert the sunlight arriving at their light-receiving surface to electrical power through photo-generated charge carriers (typically electrons and holes) in the semiconductor absorber. In a module with a plurality of solar cells, any shaded cells cannot produce the same amount of electrical power (or electrical current) as the non-shaded cells laminated within the same PV module. Since all the cells laminated in a typical PV module are usually connected in series strings, differences in power also cause differences in photo-generated electrical currents through the cells (shaded vs. non-shaded cells). If one attempts to drive the higher current of the series-connected non-shaded cells through a shaded (or partially shaded) cell which is also connected in series with the non-shaded cells, the voltage of the shaded cell (or partially shaded cell) actually becomes negative (i.e., the shaded cell effectively becomes reverse biased). Under this reverse bias condition the shaded cell is consuming or dissipating significant power instead of producing power. The power consumed and dissipated by the shaded or partially-shaded cell will cause the cell to heat up, creating a localized hot spot within the module where the shaded cell is located, and eventually possibly causing permanent cell and module failure, hence creating major reliability failure problems in the field (unless protective measures are implemented).
A standard (i.e., typically a PV module comprising 60 solar cells) crystalline silicon PV module is typically wired into three 20-cell (or 24 cells in the case of 72-cell modules or 32 cells in the case of 96-cell modules) series-connected strings within the PV module, with each string of 20 cells protected by an external bypass diode (typically either a pn junction diode or a Schottky diode) placed in an external junction box. These strings of 20 cells are electrically connected in series to each other within the junction box to form the final PV module assembly electrical interconnections and to provide the output electrical leads of the module, typically comprising series-connected solar cells. As long as the PV module receives relatively uniform solar irradiation on its surface and no cells are shaded, the cells within the module will produce essentially equal amounts of power (and electrical current), with a cell maximum-power voltage or Vmp on the order of approximately ˜0.5 V to 0.6 V for most crystalline silicon PV modules. Hence, the maximum-power voltage or Vmp across each string of 20 cells connected in series will be approximately on the order of 10 to 12 V for a 60-cell PV module comprising three 20-cell series-connected sub-strings using crystalline silicon cells. Under a uniform module illumination condition, each external bypass diode will have about −10 to −12 V reverse bias voltage across its terminals (for instance, while the module operates at its maximum-power point or MPP) and the bypass diode remains in the reverse-biased OFF state (hence, there would be no impact on the module power output by the reverse biased external bypass diodes located in the junction box). In the case where a solar cell in a 20-cell string is partially or fully shaded, it produces less electrical power (and less electrical current) than the non-shaded cells. Since the cells in the string are usually connected in electrical series, the shaded solar cell effectively becomes reverse biased and starts to dissipate electrical power, and therefore, would create localized hot spot at the location of the reverse-biased shaded cell, instead of producing power. Unless appropriate precautions are taken, the power dissipation and the resulting localized heating of the shaded cell may result in poor cell and module reliability due to possible catastrophic failure (such as failure of the reverse-biased shaded cell, failure of cell-to-cell electrical interconnections, and/or failure of the module lamination materials such as the module encapsulant and/or backsheet), as well as possible fire hazards due to excessive heating or hot spots in the installed PV systems.
Crystalline silicon modules often use external bypass diodes in order to eliminate the above-mentioned hot-spot effects caused by the partial or full shading of solar cells, and to prevent the resulting potential cell and module reliability failures and safety hazards due to cell reverse bias heating. Such hot-spot phenomena, which are caused by reverse biasing of the shaded cells, may permanently damage the affected PV cells and even cause fire hazards if the sunlight arriving at the surface of the PV cells in a PV module is not sufficiently uniform (for instance, due to full or even partial shading of one or more solar cells). Bypass diodes (rectifiers) are usually placed across the sub-strings of solar cells within the PV module, typically one external bypass diode per sub-string of 20 solar cells in a standard 60-cell crystalline silicon solar module with three 20-cell sub-strings (the configuration may be one external bypass diode per sub-string of 24 solar cells in a 72-cell crystalline silicon solar module with three 24-cell sub-strings; many other configurations are possible for modules with any number of solar cells). This connection configuration with external bypass diodes across the series-connected cell strings prevents the reverse bias hot spots in the modules and enables the PV modules to operate with high reliability throughout their lifetime under various real life shading or partial shading or soiling conditions. In the absence of cell shading, each cell in the string acts as a current source with relatively matched current values with the other cells in the sub-string, with the external bypass diode in the sub-string being reversed biased with the total voltage of the sub-string in the module (e.g., 20 cells in series create approximately about 10 V to 12 V reverse bias across the bypass diode in a crystalline silicon PV module). With shading of a cell in a sub-string, the shaded cell is reverse biased, turning on the bypass diode for the sub-string containing the shaded cell, thereby allowing the current from the good solar cells in the non-shaded sub-strings to flow through the external bypass diode associated with the sub-string with a shaded cell. While the external bypass diodes (typically three external bypass diodes included in the standard mainstream 60-cell crystalline silicon PV module junction box) protect the PV module and cells in case of shading of the cells, they can also actually result in significant loss of power harvesting and energy yield for the installed PV systems as a result of shading losses.
FIGS. 3A and 3B are diagrams of representative 60-cell crystalline silicon solar module with three 20-cell sub-strings 2 (with 20 cells in each sub-string connected in series) connected in series, and three external bypass diodes 4 to protect the cells during shading or excessive partial shading of any cells in the module (FIG. 3A shows single-cell shading, shaded cell 6, and FIG. 3B shows multi-cell partial shading conditions, partially shaded row 8). As an example, FIG. 3A shows a 60-cell module with 1 shaded cell in the bottom row (one 20-cell sub-string affected by even a single-cell shading) and FIG. 3B shows a 60-cell module with 6 partially shaded cells in the bottom row (three 20-cell sub-strings all affected by shading). If one or more cells are shaded (or partially shaded to a significant degree of shading) in a sub-string (as shown in FIG. 3A), the external bypass diode for the sub-string with the shaded cell(s) is activated and shunts the entire sub-string, thus both protecting the shaded cell(s) by preventing the hot spots and also reducing the effective module power output by about ⅓ (if only one sub-string out of three is affected by solar cell shading). If at least one cell per sub-string is shaded (as shown in FIG. 3B), all three bypass diodes are activated and shunt the entire module, thus preventing extraction of any power from the module when there is at least one shaded or partially shaded cell in each of the three 20-cell sub-strings.
As an example, a typical prior art external PV module junction box may house three external bypass diodes in a 60-cell crystalline silicon solar module. The external junction box and related external bypass diodes contribute to a portion of the overall PV module Bill of Materials (BOM) cost and may contribute about 10% (or about 5% to 15%) of the PV module BOM cost (i.e., as a percentage of the PV Module BOM cost excluding the cost of solar cells). Moreover, the external junction box may also be a source of field reliability failures and fire hazards in the installed PV systems. While most current crystalline silicon PV modules predominantly use external junction boxes with external bypass diodes placed in the junction box, there have been some examples of PV modules with front-contact cells placing and laminating the three bypass diodes directly within the PV module assembly, but separate from the front-contact solar cells, during the module lamination process (however, still using one bypass diode per 20-cell sub-string of front-contact cells). This example still has the limitations of external bypass diodes, i.e., even when a single cell is shaded, the bypass diode shunts the entire substring of cells with the shaded cell within the sub-string, thus, reducing the power harvesting and energy yield capability of the installed PV system.
One known prior art method to minimize the reliability failure effects of shading on a module in a series string of modules is to use bypass diodes across modules connected in series, as schematically shown in FIGS. 4A and 4B along with an example circuit depicted in FIG. 5. This configuration is in effect the same as the modules with external bypass diodes within each module junction box. FIG. 4A shows a non-shaded current path for a series-connected string of solar PV modules and FIG. 4B shows the same series-connected string of solar PV modules with one module shaded and the associated bypass diode across the shaded module shunting the module and providing an alternative bypass current path for the series string. FIG. 5 is a schematic circuit model diagram of a plurality of series-connected solar cells with an external bypass diode used in a module sub-string or string (each solar cell shown with its equivalent electrical circuit diagram, comprising a current source, a rectifier diode, as well as parasitic series and parallel resistance elements). If none of the cells in a series-connected string are shaded, the bypass diode remains in the reverse bias state and the solar cell string operates normally, contributing fully to the solar module power generation. If any of the cells are partially or fully shaded, the shaded cell(s) (hence, all the solar cells in the series-connected string) is (are) reverse biased and the external bypass diode is, therefore, forward biased, hence, eliminating the possibility of a hot spot, reliability failure, and/or damage to the shaded cell(s). In other words, when at least a portion of a PV module becomes shaded, its bypass diode becomes forward biased and conducts electrical current preventing performance degradation and reliability problems in the series string of modules. The bypass diode holds the voltage of the entire shaded module (or a sub-string with at least one shaded cell) to a small negative voltage (e.g., −0.5V to 0.7V) limiting the overall power reduction in the module string array output.
FIG. 6 is a graph showing the current-voltage (I-V) characteristics of a typical crystalline solar cell with and without a bypass diode (example shown with a pn junction bypass diode; for Schottky diode the actual voltage drop would be less). The bypass diode limits the maximum reverse bias voltage applied across a shaded solar cell to no more than the turn-on forward bias voltage of the bypass diode (e.g., between about 0.3V-0.5V and 0.6V-0.7V for Schottky or pn junction bypass diodes, respectively).
FIG. 7 is a diagram showing a representative example of a crystalline silicon PV module similar to that of FIGS. 4 and 5 with one shaded (or partially shaded) cell per 20-cell sub-string within a 60-cell module (such as shaded cell 10, three cells are shaded total, as shown in this representative example) wherein the three shaded cells in the three 20-cell sub-strings result in the elimination of electrical power provided by the entire solar PV module since all three 20-cell sub-strings are shunted by their external bypass diodes to protect the shaded cells. Using an arrangement of one external bypass diode per 20-cell sub-string, the result of having three shaded cells in the three 20-cell sub-strings is that the electrical power extracted from the PV module essentially drops to zero even though only 3/60 of the module (or 3 out of 60 cells) is affected by shading. Again, this type of prior art PV module arrangement with external bypass diodes can result in significant energy yield reduction and power harvesting penalty for the installed PV systems in the field, particularly in the installations which are most susceptible to module shading and/or soiling conditions.
In crystalline silicon PV system installations with multiple module strings, the module shading effects and their detrimental impact on power harvesting and energy yield may be much larger than the examples shown above with a single series string of modules. In solar PV systems with multiple parallel strings of series-connected module strings, the parallel strings must produce approximately the same voltage as one another (i.e., the voltages of parallel strings must be closely matched, or else, there will be significant power losses). As a result, the electrical constraint of having all module strings connected in parallel operating at approximately the same voltage does not allow full flexibility for a shaded string to activate its bypass diodes without significant installed PV array power loss. Therefore, in essentially all cases, shade or even partial shading on PV modules affecting even one cell within one of the strings may actually cut off the power produced by the entire string. As a representative example, consider one non-shaded PV module string and one PV module string that is shaded as described in the previous example above. A Maximum-Power-Point-Tracking (MPPT) capability will enable the production of full power from the first PV module string and the production of 70% of full power from the second PV module string. In this way, both strings reach the same voltage (the currents from the parallel strings are additive at the same module string voltage for the parallel connected strings of series-connected modules). Therefore, in this example and using a centralized DC-to-AC inverter with centralized MPPT, the power produced by the PV module array would be 85% of the maximum possible power without any module shading. This represents a 15% power loss for the PV system.
FIGS. 8 and 9 are diagrams showing two examples of known PV system installations. FIG. 8 shows example of a prior art 3×6 array of PV modules (for instance, each with 50 W output) with bypass diodes connected to produce 600 V DC, 900 W PV output. FIG. 9 shows a series connection of 3 PV modules with external module bypass diodes and a blocking diode along with a charging battery. In conventional crystalline solar PV modules, the module strings connected in series and in parallel may typically use external bypass (and also blocking diodes in case of battery charging circuits). However, similar to previously described examples, these representative prior art PV module installations suffer from the electrical power harvesting limitation and reduced energy yield of the installed PV system due to the problems or performance constraints outlined earlier.
Another representative example of a prior art implementation is the monolithic compound semiconductor bypass diode used with a front-contact (emitter contact fingers and busbars on the front-side of the solar cell), compound semiconductor (III-V) on germanium substrate, multi junction solar cell, primarily for Concentrator PV (or CPV) applications. FIG. 10 is a diagram showing an example of this prior art monolithic bypass diode with a front-contact multi junction compound semiconductor CPV solar cell fabricated using compound multi junction solar cell layers on a starting germanium substrate (in order to provide relatively close lattice matching for growth of the multi-junction solar cell layer). This prior art example shows a multi-layer compound semiconductor Schottky diode used as a so-called bypass diode on the same starting germanium (Ge) wafer also used for making a front-contacted compound semiconductor, multi junction solar cell for CPV applications. In this example, the Schottky bypass diode and the compound semiconductor (gallium arsenide and its ternary III-V alloys in this prior art case), multi junction solar cell are both on the same side (top side) of the solar cell, with electrical contacts on both the solar cell sunnyside and opposite the sunnyside on the backside, and have different material layer stacks (i.e., the deposited and processed material stack used for the Schottky diode is quite different from the deposited and processed material stack used for the multi junction solar cell), thereby making the solar cell fabrication process much more complicated (due to the added manufacturing process steps and additional material layers used for the Schottky diode device) and costly (hence, such embodiment only demonstrated for the CPV application in which the CPV cells are quite expensive, far more expensive than the crystalline silicon solar cells as well as other non-CPV solar cells). Another limitation and potential manufacturing yield and complexity problem with this prior art implementation is that the material stack thicknesses or heights of the multi junction solar cell and the Schottky diode are different. This represents further challenges and added process complexity for implementation of the monolithic metallization contacts and interconnections of the solar cell and the Schottky diode. As a result of this prior art monolithic Schottky bypass diode with the expensive multi junction solar cell on the same expensive germanium substrate, the overall process complexity due to added process steps and manufacturing cost of this prior art multi junction solar cell embodiment are substantially and further increased, while incurring an effective solar cell and solar module (and installed PV system) efficiency penalty or loss due to the integration of the Schottky bypass diode on the same side as the active sunnyside of the cell (and the fact that the relative area ratio of the bypass diode to the relatively small active CPV multi junction cell area is rather large). This monolithic bypass Schottky diode made on a germanium substrate with a front-emitter-contacted compound semiconductor multi junction solar cell requires substantially different stacks of material layers in the solar cell and in the bypass diode, hence, substantially complicating the overall monolithic solar cell and Schottky diode processing, increasing the number of solar cell fabrication process steps, and raising its overall manufacturing cost. While such significant added processing complexity due to added process steps and cost increase for fabrication of the solar cell may be acceptable in a CPV solar cell due to the relatively high concentration ratios used, it cannot be economically viable or practical in a non-very-high concentration-CPV solar cell such as in crystalline silicon solar cells.
FIG. 11 is a diagram showing an example of a known monolithic bypass diode with a multi junction compound semiconductor CPV cell. All of the constraints and limitations (including process complexity and cost) of the monolithic Schottky bypass diode of the prior art structure shown in FIG. 10 also apply to the one depicted in FIG. 11. This prior art example shows a pn junction diode (instead of a Schottky diode) used as monolithic bypass diode on the same germanium (Ge) substrate as a compound semiconductor, multi junction (with a combination of ternary GaAs alloys used in a multi-layer structure) solar cell. In this example, the pn junction bypass diode and the compound semiconductor, multi junction solar cell are both on the same side (top side) of the solar cell, and have different material stacks (hence, processes and material layers not harmonized with respect to each other), thereby making the solar cell fabrication process much more complicated and costly (hence, such embodiment only demonstrated for the CPV application in which the CPV multi junction solar cells are much more expensive than the non-CPV single junction solar cells). In this prior art example, as a result of monolithic integration of the pn junction bypass diode with the solar cell on the same expensive germanium substrate (for subsequent growth of relatively lattice matched III-V binary and ternary compound semiconductor layers), the overall manufacturing process complexity and cost are further increased while incurring an effective solar cell and solar module (and installed CPV system) efficiency penalty due to the integration of the bypass diode on the same side as the active sunnyside of the cell, and due to the dis-similar material stack structures used in the CPV solar cell and the associated pn junction diode). Again, this monolithic integration of the bypass pn junction diode on a front-contact compound semiconductor multi junction CPV solar cell requires different stacks of material layers in the solar cell and in the bypass diode, hence, substantially complicating the overall monolithic solar cell structure and its fabrication processing, increasing the number of solar cell fabrication process steps, and raising its manufacturing cost. While such significant added processing complexity and cost increase for fabrication of the solar cell may be acceptable in an expensive and complex CPV solar cell used for CPV systems, it cannot be economically viable in a non-CPV (non-very-high-concentration-PV) solar cell such as in the much more widely used crystalline silicon solar cells and modules.
In general, while the prior art monolithic integration of the bypass diode (Schottky diode or pn junction diode) as shown, on an expensive multi junction front-contact solar cell on an expensive germanium substrate for very high concentration CPV applications, may be acceptable (although far from being a low-cost solution) for that specific application despite the extra processing steps and lack of harmonization between the material stacks and process steps, extra manufacturing cost, and added manufacturing process complexity of the monolithic integration with the solar cell, the prior art approaches demonstrated for the expensive compound semiconductor multi junction solar cells on expensive starting substrates (with expensive MOCVD-grown multi-junction compound semiconductor material stacks) would be prohibitively too complex, expensive, and not acceptable for mainstream flat-panel (non-concentrating or low to medium concentration) low-cost solar PV cells and modules. Also, as noted previously, because the prior art method of monolithic integration of the bypass diode consumes a fairly large area fraction, otherwise used by the expensive solar cell, it reduces the effective area for sunlight absorption and hence the effective cell efficiency due to loss of sunlight absorption area. In prior art demonstration of the monolithic bypass diode with an expensive compound semiconductor multi junction solar cell on an expensive germanium substrate, the electrical metallization and contacts of the solar cell and the bypass diode are on both sides of the devices and the substrate, including both on the sunnyside and on the backside of the substrate, making the overall monolithic interconnections of the solar cell and the bypass diode more complex and costly.